Overview

Research and Development in the VLSI (Very Large Scale Integration) Technology area is focused on the Design, Verification and Implementation of high performance Integrated Circuits (ICs) commercially known as Chip using sophisticated Electronic

Design Automation (EDA) tools and methods. Current research work and projects cover all strategically important areas including High-tech Industry Standard Advanced HDL based Chip Design Methodology that includes RTL modeling using HDL (Hardware Description Language) such as Verilog and VHDL, functional simulation, logic synthesis and schematic generation, structural Simulation, floorplan, placement, routing, mapping and implement the deign in sophisticated FPGA (Field Programmable Gate Array) and CPLD (Complex Programmable Logic Device) using industry leader Xilinx and Altera Development Board.

VLSI area also includes STA (Static Timing Analysis), low power techniques, DFT (Design for Testability such as JTAG, Boundary Scan), Coverage Analysis, DFM (Design for Manufacturability), hardware/software co-design, layout design with an emphasis on CMOS technology targeted to Application Specific Integrated Circuits (ASICs) and System-on-a-Chip (SOC) design. Physical design of the IC chip covering techniques such as cell and hard macro placement, power grid design, clock tree synthesis (CTS), global and detail routing of signals, power routing are also included in this area. Advance topics in this area include IR drop analysis, electromigration, signal integrity, critical path analysis and power island design in low power high speed integrated circuits